The integrated circuit manufacturing industry has been continually growing via linewidth shrinking. Extreme Ultra-Violet (EUV) lithography is a promising technology considered for exposure of 36 nm pitch and below. Down to 5 nm logic technology node, the design keeps shrinking and it becomes too tedious for 193 nm multiple patterning since it may require 5 or 6 exposures for a single layer which can fit well within a single EUV exposure. Therefore, it is expected that the 5 nm node will be the first node that will adopt EUV lithography on a large scale. The chief ray angle of incidence with 6° in EUV lithography causes shadowing effect which results in pattern shift ^[1].

Unlike traditional refractive, or catadioptric lithography, EUV lithography uses a reflective system with a multilayer film stack and absorber shown in Figure 1, which is used to do the EUV design rule simulation. In EUV lithography, the simulation work is much heavier than that of 193 nm. In the film stack, there are both 60 nm thick absorber and 80 alternating high-low highly reflecting layers that located below the absorber. The multi-layers consists of 40 pairs of alternating 4.2 nm silicon and 2.8 nm molybdenum thin films. When we use Finite Difference Time Domain (FDTD) method, due to the need to use perfect matching layer (PML) boundary condition and the invalidity of periodical boundary condition as a result of the non-vertical illumination chief ray angle, the reflective optical beam path, the need for multiple illumination pupil locations, and thick mask, the simulation work is more than 300 times that of 193 nm immersion and 1000 times more for 1D and 2D, respectively. Therefore, the FDTD method is too slow to be used for EUV 2D simulation. In this paper, we have done a simulation study for typical 5 nm logic design rule patterns with the self-developed aerial image simulator based on much faster rigorous coupled wave analysis (RCWA) algorithm instead of FDTD and the Abbe imaging routine and we have calibrated our model with wafer exposure data from several photoresists under collaboration with IMEC. We also matched the RCWA 1D results with our 1D results based on Finite Difference Time Domain (FDTD).

We have used 35 orders in each of X and Y dimensions. The mask film stacks include 40 pairs Mo/Si high reflection layers, one TaN absorber layer and one Ru protection layer.

We have used a NA of 0.33 and 0.9-0.7 Quasar 35° partial coherence setting with a typical 30 nm thick Chemically Amplified photoresist (CAR). Figure 2 shows the shadowing effect at different slit positions, 0, -13 mm, and 13 mm. In order to avoid the stochastic printing failures ^[2], the anchor point is set at 36 nm pitch and 18 nm ADI Critical Dimension (CD) and the corresponding reasonable Exposure Latitude (EL) must be ≥ 18% ^[3]. At the center of the exposure slit, the pattern shift in -Y direction results from shadowing effect is about 1.52 nm ^[1] for pattern oriented along X direction, while that shift of the pattern along Y direction is 0 nm. When slit position is not in the center, patterns that orients either along X or Y direction will have shift. However, the shift of the pattern along Y direction is much smaller than that of pattern along X direction. With the slit position away from center, the shift of the pattern along X direction becomes smaller and that of the pattern along Y direction becomes larger.

The simulation data of typical design rule patterns are displayed in Table 1(a) and Table 1(b). These data include simulated EL and CD and recommended EL and CD. For Table 1(a), the patterns are, from left to right, tip-to-line(TtL), tip-to-tip (TtT) within dense pattern, TtT, TtT on one side of dense pattern, staggered TtT, short bar on one side of wider line, minimum isolated area on one side of wider line. For Table 1(b), the patterns are, from left to right, isolated short bar on one side of dense line/space, minimum isolated area on one side of dense line/space, left line of isolated tri-lines (the right two lines are represented by hollow bars), center line of isolated tri-lines (the two edge lines are represented by hollow bars), right line of isolated tri-lines (the left two lines are represented by hollow bars), left line of isolated bi-lines (the right line is represented by a hollow bar), right line of isolated bi-lines (the left line is represented by a hollow bar). Recalling in 193 nm immersion lithography, according to the setting of typical design rules, the EL for 2D patterns, such as TtT and TtL is ≥ 10%, which is smaller than the EL for the most dense line and space patterns, say ≥13% for the metal and ≥18% for the gate ^[4]. For 2D patterns in EUV lithography, taking EUV stochastics impact into account，EL for the line and space patterns are recommended to be at least 18%, therefore, EL for the 2D patterns must be upgraded to ≥ 13%, In the following sections, the simulation results of several patterns are discussed. In order to obtain acceptable process window data, we have added appropriate optical proximity correction (OPC) which is not shown here.

2.1 The Simulation of Typical Design Rule Patterns with EUV Photolithographic Process

A typical mask of TtT pattern is depicted in Figure 3. The pattern pitch is 36 nm and trench CD on mask is 18 nm with TtT gap CD equal to 11.2 nm. From the simulation results, line cut ① as the anchor point, taking EUV stochastics impact into account, EL must be ≥ 18%, ③ is the TtT line cut which EL must be ≥ 13%. Line cut ② and ④ is the trench width near the tip, which is used as monitor of optical proximity effect. From our simulation, we have found that the CD and EL at all line cut positions satisfy our target requirement with TtT CD close to target of 20 nm.

Shown in Figure 4 is another situation. The mask CD of isolated area is 21 nm along X direction (at line cut ① position) and 72 nm along Y direction (at line cut ② position) and the wider trench next to the isolated area has a CD of 43.2 nm (at line cut ③ position). In order to achieve an EL more than 13%, we have found that the minimum area is about 5 times that of minimum pixel squared, i.e. 5×18×18 nm², with about 17.5 nm contour CD at line cut ① position.

Figure 5 described another pattern, which is one of the most challenging patterns in photolithography: the bi-lines. For process window consideration, we have found that the minimum pitch can also be kept at 36 nm, while a mask bias of 1.8 nm must be used compared to anchor pattern.

2.2 Increased Impact of Aberration in EUV Lithography

From Figure 6, we can see that pattern shift caused by aberration is inversely proportional to NA. Because NA for EUV is much smaller than that for 193 nm immersion, its horizontal position is more sensitive to odd aberration. Then, compared to aberration impact from 193 immersion, aberration from 0.33NA EUV exposure tools needs be controlled to a smaller extent. In the following sections, the pattern shift owing to Transverse Coma aberration of 2D patterns, as mentioned in Table 1(a) and 1(b), is discussed.

For different 2D patterns, the transverse aberration (Coma) in X- or Y-direction of 0.2 nm root-mean-square (rms) and 0.7 nm rms are shown in Figure 7. As expected, the OVL must be controlled to within ± 2.5 nm in 5 nm Logic Process. When the transverse Coma in Y (Z8) is 0.2 nm rms shown in Figure 7(a), the pattern shift for typical 2D patterns contributing to OVL budget is in the range of -1~+1 nm, which is reasonable. For bi-lines and tri-lines shown in Figure 7(b), these pattern shifts are all in the range of 0.6 nm under typical transverse Coma in X(Z7) of 0.2 nm rms and 0.7 nm rms. Next, we will describe in detail pattern shifts owing to Coma aberration of three patterns.

The mask pitch is 36 nm and mask trench CD is 18 nm with TtT gap CD of 11.2 nm. For TtT pattern shown in Figure 8, a transverse coma in Y-direction of 0.7 nm rms is found to result in a pattern shift and cause a distortion of the tips: necking on the “a” side.

As shown in Figure 9, the mask CD of isolated area is 21 nm along X direction (at line cut ① position) and 90 nm along Y direction (at line cut ② position) and the wider CD next to the isolated area is 43.2 nm (at line cut ③ position). For isolated pattern, the aberration can not only cause the pattern shift and but also result in significant distortion, especially in the case when the aberration is 0.7 nm rms.

For isolated tri-lines shown in Figure 10, a mask bias of 3 nm for the two edge trenches have been used compared to the center trench. The transverse aberration can cause pattern shift and cause CD and EL change asymmetrically around the center trench. The CD of the left line is smaller by more than about 10% and 50% with 0.2 nm and 0.7 nm rms aberration, respectively.

Based on above simulation results, rms aberration for EUV lithography with 0.33NA needs to be kept under 0.2 nm while the rms aberration for 193 nm immersion exposure tools are usually kept under 1 nm^[5]. All these impact including in CD, EL, and pattern shape fidelity must be compensated by OPC.

We have performed a simulation study on typical 5 nm logic FinFET design rule patterns with EUV photolithography process. What we have found is as follows. The shift resulting from shadowing effect is about 0.5~1.5 nm. A reasonable target of minimum EL for the metal layer and the tip-to-tip pattern are, respectively, ≥18%, 13%. The minimum area of metal layer is about 5 times that of minimum pixel squared, i.e. 5×18×18 nm2. The OVL must be controlled to within ± 2.5 nm in the 5 nm Logic Process. Generally speaking, rms aberration EUV lithography needs to be kept under 0.2 nm. Transverse aberration, e.g. Coma can obviously impact the CD, especially when the aberration is around 0.7 nm rms. The pattern variation due to aberration, such as shift and distortion must be compensated by OPC.